Semiconductor devices are active element-including electronic devices using electrical characteristics of a semiconductor. Such semiconductor devices have been widely used in audio equipment, communication equipment, computers, electric appliances, and the like. The semiconductor devices are typically configured to include TFTs (thin film transistors) formed on a glass substrate, and wiring layers such as gate, source and drain wirings connected to the TFTs. The TFTs are used as a switching element or a driving circuit for controlling driving of pixels, in active matrix liquid crystal display devices, and the like. Larger and higher-definition LCDs are now being developed rapidly. Along with this, the semiconductor devices need to be more improved in performances, and more efficient production steps for such devices are also needed.
TFTs are typically so configured that a semiconductor layer, a gate insulating film, a gate electrode, and an interlayer insulating film are stacked on a glass substrate; source and drain electrodes are connected to the semiconductor layer through a contact hole formed in the interlayer insulating film, and a gate wiring is connected to the gate electrode. Further, a source wiring is connected to the source electrode, and a drain wiring is connected to the drain electrode.
In such a configuration in which base patterns, including the gate electrode, are formed, and thereon, the source electrode (wiring layer) and the like is formed, malfunction of the semiconductor device possibly occurs depending on a shape of the base patterns.
Specifically, according to such a configuration as in FIG. 6 in which a TFT including a semiconductor layer 202, a gate insulating film 203, and a gate electrode 206, stacked each other; a gate wiring 205a; a source wiring 205b; and an interlayer insulating film 221 covering these components are formed on a glass substrate 201, a metal residue 200 that might be generated at formation of a wiring layer 205 is deposited on the interlayer insulating film 211 in a region overlapping with the wiring layer 205 such as a gate wiring 205a, a source wiring 205b, and the like. This metal residue 200 might cause a short-circuit between the wiring layers 205.
For this problem, for example, Patent Documents 1 to 3 disclose the following method for flattening the base patterns. Base patterns such as a gate electrode are formed on a substrate, and then, a photosensitive organic film with insulating property is applied on the base patterns. This film is exposed from the substrate side using the base pattern as a mask, and then, a part of the film is removed by development. Thus, the base patterns are flattened.
This method for flattening the base patterns also has room for improvement from viewpoint of the above-mentioned improvement in efficiency of the production steps.
[Patent Document 1]
Japanese Kokai Publication No. Hei-01-165127
[Patent Document 2]
Japanese Kokai Publication No. Hei-02-20828
[Patent Document 3]
Japanese Kokai Publication No. Hei-08-23102